IEEE VLSI PROJECTS
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| IEEE VLSI PROJECTS |
- 32-bit RISC CPU Based on MIPS
- A New VLSI Architecture of Parallel Multiplier–Accumulator Based on Radix-2 Modified Booth Algorithm
- A Spurious-Power Suppression Technique for Multimedia/DSP Applications
- A Versatile Multimedia Functional Unit Design Using the Spurious Power Suppression Technique (2010)
- An Efficient Architecture for 2-D Lifting-based Discrete Wavelet Transform
- An Efficient Architecture for 3-D Discrete Wavelet Transform
- DDR3 based lookup circuit for high-performance network processing
- Design and Implementation of 10/100 Mbps (Mega bits per second) Ethernet Switch for Network applications (2010)
- Design and Implementation of Digital low power base band processor for RFID Tags (2010)
